From 02c9b2588e0c9df6c14cb0bb0a862a5dad4e6b4c Mon Sep 17 00:00:00 2001 From: Pratham Pratap Date: Thu, 30 Aug 2018 16:40:24 +0530 Subject: [PATCH] ARM: dts: msm: Update phy resets for QMP phy on SM6150 This change updates phy only reset and block reset for QMP phy on SM6150. Also modify compatible type for QMP PHY since it supports USB3 or DP. Change-Id: Ide8221d322410429577cd281cd9fa6a5b11ce785 Signed-off-by: Pratham Pratap --- arch/arm64/boot/dts/qcom/sm6150-usb.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6150-usb.dtsi b/arch/arm64/boot/dts/qcom/sm6150-usb.dtsi index 73150062fa22..36659cac7c82 100644 --- a/arch/arm64/boot/dts/qcom/sm6150-usb.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150-usb.dtsi @@ -163,7 +163,7 @@ /* Primary USB port related QMP USB PHY */ usb_qmp_phy: ssphy@88e6000 { - compatible = "qcom,usb-ssphy-qmp-v2"; + compatible = "qcom,usb-ssphy-qmp-usb3-or-dp"; reg = <0x88e6000 0x1000>; reg-names = "qmp_phy_base"; @@ -297,9 +297,9 @@ clock-names = "aux_clk", "pipe_clk", "ref_clk_src", "ref_clk", "com_aux_clk", "cfg_ahb_clk"; - resets = <&clock_gcc GCC_USB3_DP_PHY_PRIM_SP0_BCR>, + resets = <&clock_gcc GCC_USB3_PHY_PRIM_SP0_BCR>, <&clock_gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; - reset-names = "phy_phy_reset", "phy_reset"; + reset-names = "phy_reset", "phy_phy_reset"; }; usb_audio_qmi_dev {