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/*
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* mv64x60_wdt.c - MV64X60 (Marvell Discovery) watchdog userspace interface
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*
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* Author: James Chapman <jchapman@katalix.com>
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*
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* Platform-specific setup code should configure the dog to generate
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* interrupt or reset as required. This code only enables/disables
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* and services the watchdog.
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*
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* Derived from mpc8xx_wdt.c, with the following copyright.
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*
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* 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/watchdog.h>
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#include <linux/platform_device.h>
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#include <asm/mv64x60.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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/* MV64x60 WDC (config) register access definitions */
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#define MV64x60_WDC_CTL1_MASK (3 << 24)
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#define MV64x60_WDC_CTL1(val) ((val & 3) << 24)
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#define MV64x60_WDC_CTL2_MASK (3 << 26)
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#define MV64x60_WDC_CTL2(val) ((val & 3) << 26)
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/* Flags bits */
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#define MV64x60_WDOG_FLAG_OPENED 0
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#define MV64x60_WDOG_FLAG_ENABLED 1
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static unsigned long wdt_flags;
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static int wdt_status;
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static void __iomem *mv64x60_regs;
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static int mv64x60_wdt_timeout;
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static void mv64x60_wdt_reg_write(u32 val)
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{
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/* Allow write only to CTL1 / CTL2 fields, retaining values in
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* other fields.
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*/
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u32 data = readl(mv64x60_regs + MV64x60_WDT_WDC);
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data &= ~(MV64x60_WDC_CTL1_MASK | MV64x60_WDC_CTL2_MASK);
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data |= val;
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writel(data, mv64x60_regs + MV64x60_WDT_WDC);
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}
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static void mv64x60_wdt_service(void)
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{
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/* Write 01 followed by 10 to CTL2 */
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mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x01));
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mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x02));
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}
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static void mv64x60_wdt_handler_disable(void)
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{
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if (test_and_clear_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) {
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/* Write 01 followed by 10 to CTL1 */
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mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
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mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
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printk(KERN_NOTICE "mv64x60_wdt: watchdog deactivated\n");
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}
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}
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static void mv64x60_wdt_handler_enable(void)
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{
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if (!test_and_set_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) {
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/* Write 01 followed by 10 to CTL1 */
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mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
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mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
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printk(KERN_NOTICE "mv64x60_wdt: watchdog activated\n");
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}
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}
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static int mv64x60_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags))
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return -EBUSY;
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mv64x60_wdt_service();
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mv64x60_wdt_handler_enable();
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nonseekable_open(inode, file);
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return 0;
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}
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static int mv64x60_wdt_release(struct inode *inode, struct file *file)
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{
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mv64x60_wdt_service();
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#if !defined(CONFIG_WATCHDOG_NOWAYOUT)
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mv64x60_wdt_handler_disable();
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#endif
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clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags);
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return 0;
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}
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static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
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size_t len, loff_t * ppos)
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{
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if (len)
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mv64x60_wdt_service();
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return len;
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}
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static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int timeout;
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void __user *argp = (void __user *)arg;
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static struct watchdog_info info = {
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.options = WDIOF_KEEPALIVEPING,
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.firmware_version = 0,
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.identity = "MV64x60 watchdog",
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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if (copy_to_user(argp, &info, sizeof(info)))
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return -EFAULT;
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break;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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if (put_user(wdt_status, (int __user *)argp))
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return -EFAULT;
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wdt_status &= ~WDIOF_KEEPALIVEPING;
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break;
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case WDIOC_GETTEMP:
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return -EOPNOTSUPP;
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case WDIOC_SETOPTIONS:
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return -EOPNOTSUPP;
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case WDIOC_KEEPALIVE:
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mv64x60_wdt_service();
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wdt_status |= WDIOF_KEEPALIVEPING;
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break;
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case WDIOC_SETTIMEOUT:
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return -EOPNOTSUPP;
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case WDIOC_GETTIMEOUT:
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timeout = mv64x60_wdt_timeout * HZ;
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if (put_user(timeout, (int __user *)argp))
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return -EFAULT;
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break;
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default:
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return -ENOTTY;
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}
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return 0;
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}
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static const struct file_operations mv64x60_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = mv64x60_wdt_write,
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.ioctl = mv64x60_wdt_ioctl,
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.open = mv64x60_wdt_open,
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.release = mv64x60_wdt_release,
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};
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static struct miscdevice mv64x60_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &mv64x60_wdt_fops,
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};
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static int __devinit mv64x60_wdt_probe(struct platform_device *dev)
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{
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struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data;
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int bus_clk = 133;
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mv64x60_wdt_timeout = 10;
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if (pdata) {
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mv64x60_wdt_timeout = pdata->timeout;
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bus_clk = pdata->bus_clk;
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}
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mv64x60_regs = mv64x60_get_bridge_vbase();
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writel((mv64x60_wdt_timeout * (bus_clk * 1000000)) >> 8,
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mv64x60_regs + MV64x60_WDT_WDC);
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return misc_register(&mv64x60_wdt_miscdev);
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}
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static int __devexit mv64x60_wdt_remove(struct platform_device *dev)
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{
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misc_deregister(&mv64x60_wdt_miscdev);
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mv64x60_wdt_service();
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mv64x60_wdt_handler_disable();
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return 0;
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}
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static struct platform_driver mv64x60_wdt_driver = {
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.probe = mv64x60_wdt_probe,
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.remove = __devexit_p(mv64x60_wdt_remove),
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.driver = {
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.owner = THIS_MODULE,
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.name = MV64x60_WDT_NAME,
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},
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};
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static struct platform_device *mv64x60_wdt_dev;
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static int __init mv64x60_wdt_init(void)
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{
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int ret;
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printk(KERN_INFO "MV64x60 watchdog driver\n");
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mv64x60_wdt_dev = platform_device_alloc(MV64x60_WDT_NAME, -1);
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if (!mv64x60_wdt_dev) {
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ret = -ENOMEM;
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goto out;
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}
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ret = platform_device_add(mv64x60_wdt_dev);
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if (ret) {
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platform_device_put(mv64x60_wdt_dev);
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goto out;
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}
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ret = platform_driver_register(&mv64x60_wdt_driver);
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if (ret) {
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platform_device_unregister(mv64x60_wdt_dev);
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goto out;
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}
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out:
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return ret;
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}
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static void __exit mv64x60_wdt_exit(void)
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{
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platform_driver_unregister(&mv64x60_wdt_driver);
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platform_device_unregister(mv64x60_wdt_dev);
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}
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module_init(mv64x60_wdt_init);
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module_exit(mv64x60_wdt_exit);
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MODULE_AUTHOR("James Chapman <jchapman@katalix.com>");
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MODULE_DESCRIPTION("MV64x60 watchdog driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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