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89 lines
1.8 KiB
89 lines
1.8 KiB
19 years ago
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/*
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* Generic Power Management Routine
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*
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* Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License.
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*/
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#include <linux/suspend.h>
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#include <linux/delay.h>
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#include <linux/gfp.h>
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#include <asm/freq.h>
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#include <asm/io.h>
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#include <asm/watchdog.h>
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#include <asm/pm.h>
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#define INTR_OFFSET 0x600
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#define STBCR 0xffffff82
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#define STBCR2 0xffffff88
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#define STBCR_STBY 0x80
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#define STBCR_MSTP2 0x04
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#define MCR 0xffffff68
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#define RTCNT 0xffffff70
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#define MCR_RMODE 2
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#define MCR_RFSH 4
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void pm_enter(void)
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{
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u8 stbcr, csr;
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u16 frqcr, mcr;
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u32 vbr_new, vbr_old;
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set_bl_bit();
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/* set wdt */
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csr = sh_wdt_read_csr();
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csr &= ~WTCSR_TME;
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csr |= WTCSR_CKS_4096;
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sh_wdt_write_csr(csr);
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csr = sh_wdt_read_csr();
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sh_wdt_write_cnt(0);
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/* disable PLL1 */
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frqcr = ctrl_inw(FRQCR);
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frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
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ctrl_outw(frqcr, FRQCR);
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/* enable standby */
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stbcr = ctrl_inb(STBCR);
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ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
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/* set self-refresh */
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mcr = ctrl_inw(MCR);
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ctrl_outw(mcr & ~MCR_RFSH, MCR);
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/* set interrupt handler */
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asm volatile("stc vbr, %0" : "=r" (vbr_old));
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vbr_new = get_zeroed_page(GFP_ATOMIC);
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udelay(50);
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memcpy((void*)(vbr_new + INTR_OFFSET),
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&wakeup_start, &wakeup_end - &wakeup_start);
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asm volatile("ldc %0, vbr" : : "r" (vbr_new));
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ctrl_outw(0, RTCNT);
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ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
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cpu_sleep();
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asm volatile("ldc %0, vbr" : : "r" (vbr_old));
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free_page(vbr_new);
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/* enable PLL1 */
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frqcr = ctrl_inw(FRQCR);
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frqcr |= FRQCR_PSTBY;
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ctrl_outw(frqcr, FRQCR);
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udelay(50);
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frqcr |= FRQCR_PLLEN;
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ctrl_outw(frqcr, FRQCR);
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ctrl_outb(stbcr, STBCR);
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clear_bl_bit();
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}
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