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71 lines
2.5 KiB
71 lines
2.5 KiB
18 years ago
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/*
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* Author: Mark A. Greer <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef _PPC_BOOT_MV64x60_H_
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#define _PPC_BOOT_MV64x60_H_
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#define MV64x60_CPU_BAR_ENABLE 0x0278
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#define MV64x60_PCI_ACC_CNTL_ENABLE (1<<0)
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#define MV64x60_PCI_ACC_CNTL_REQ64 (1<<1)
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#define MV64x60_PCI_ACC_CNTL_SNOOP_NONE 0x00000000
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#define MV64x60_PCI_ACC_CNTL_SNOOP_WT 0x00000004
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#define MV64x60_PCI_ACC_CNTL_SNOOP_WB 0x00000008
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#define MV64x60_PCI_ACC_CNTL_SNOOP_MASK 0x0000000c
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#define MV64x60_PCI_ACC_CNTL_ACCPROT (1<<4)
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#define MV64x60_PCI_ACC_CNTL_WRPROT (1<<5)
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#define MV64x60_PCI_ACC_CNTL_SWAP_BYTE 0x00000000
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#define MV64x60_PCI_ACC_CNTL_SWAP_NONE 0x00000040
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#define MV64x60_PCI_ACC_CNTL_SWAP_BYTE_WORD 0x00000080
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#define MV64x60_PCI_ACC_CNTL_SWAP_WORD 0x000000c0
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#define MV64x60_PCI_ACC_CNTL_SWAP_MASK 0x000000c0
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#define MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES 0x00000000
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#define MV64x60_PCI_ACC_CNTL_MBURST_64_BYTES 0x00000100
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#define MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES 0x00000200
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#define MV64x60_PCI_ACC_CNTL_MBURST_MASK 0x00000300
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#define MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES 0x00000000
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#define MV64x60_PCI_ACC_CNTL_RDSIZE_64_BYTES 0x00000400
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#define MV64x60_PCI_ACC_CNTL_RDSIZE_128_BYTES 0x00000800
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#define MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES 0x00000c00
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#define MV64x60_PCI_ACC_CNTL_RDSIZE_MASK 0x00000c00
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struct mv64x60_cpu2pci_win {
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u32 lo;
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u32 size;
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u32 remap_hi;
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u32 remap_lo;
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};
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extern struct mv64x60_cpu2pci_win mv64x60_cpu2pci_io[2];
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extern struct mv64x60_cpu2pci_win mv64x60_cpu2pci_mem[2];
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u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
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u8 offset);
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void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
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u8 offset, u32 val);
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void mv64x60_config_ctlr_windows(u8 *bridge_base, u8 *bridge_pbase,
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u8 is_coherent);
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void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose,
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u8 bus, u32 mem_size, u32 acc_bits);
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void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi,
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u32 pci_base_lo, u32 cpu_base, u32 size,
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struct mv64x60_cpu2pci_win *offset_tbl);
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u32 mv64x60_get_mem_size(u8 *bridge_base);
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u8 *mv64x60_get_bridge_pbase(void);
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u8 *mv64x60_get_bridge_base(void);
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u8 mv64x60_is_coherent(void);
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int mv64x60_i2c_open(void);
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int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size,
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u32 count);
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void mv64x60_i2c_close(void);
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#endif /* _PPC_BOOT_MV64x60_H_ */
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