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105 lines
2.8 KiB
105 lines
2.8 KiB
5 years ago
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/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_MSM_CLOCK_ALPHA_PLL_H
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#define __ARCH_ARM_MACH_MSM_CLOCK_ALPHA_PLL_H
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#include <linux/spinlock.h>
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#include <linux/clk/msm-clk-provider.h>
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struct alpha_pll_masks {
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u32 lock_mask; /* lock_det bit */
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u32 active_mask; /* active_flag in FSM mode */
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u32 update_mask; /* update bit for dynamic update */
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u32 vco_mask; /* vco_sel bits */
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u32 vco_shift;
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u32 alpha_en_mask; /* alpha_en bit */
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u32 output_mask; /* pllout_* bits */
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u32 post_div_mask;
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u32 cal_l_val_mask;
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u32 test_ctl_lo_mask;
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u32 test_ctl_hi_mask;
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};
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struct alpha_pll_vco_tbl {
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u32 vco_val;
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unsigned long min_freq;
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unsigned long max_freq;
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};
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#define VCO(a, b, c) { \
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.vco_val = a,\
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.min_freq = b,\
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.max_freq = c,\
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}
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struct alpha_pll_clk {
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struct alpha_pll_masks *masks;
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void *const __iomem *base;
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u32 offset;
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u32 fabia_frac_offset;
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/* if fsm_en_mask is set, config PLL to FSM mode */
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u32 fsm_reg_offset;
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u32 fsm_en_mask;
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u32 enable_config; /* bitmask of outputs to be enabled */
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u32 post_div_config; /* masked post divider setting */
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u32 config_ctl_val; /* config register init value */
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u32 test_ctl_lo_val; /* test control settings */
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u32 test_ctl_hi_val;
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u32 cal_l_val; /* Calibration L value */
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struct alpha_pll_vco_tbl *vco_tbl;
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u32 num_vco;
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u32 current_vco_val;
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bool inited;
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bool slew;
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bool no_prepared_reconfig;
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/* some PLLs support dynamically updating their rate
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* without disabling the PLL first. Set this flag
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* to enable this support.
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*/
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bool dynamic_update;
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/*
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* Some chipsets need the offline request bit to be
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* cleared on a second write to the register, even though
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* SW wants the bit to be set. Set this flag to indicate
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* that the workaround is required.
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*/
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bool offline_bit_workaround;
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bool no_irq_dis;
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bool is_fabia;
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unsigned long min_supported_freq;
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struct clk c;
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};
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static inline struct alpha_pll_clk *to_alpha_pll_clk(struct clk *c)
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{
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return container_of(c, struct alpha_pll_clk, c);
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}
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#endif
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extern void __init_alpha_pll(struct clk *c);
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extern const struct clk_ops clk_ops_alpha_pll;
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extern const struct clk_ops clk_ops_alpha_pll_hwfsm;
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extern const struct clk_ops clk_ops_fixed_alpha_pll;
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extern const struct clk_ops clk_ops_dyna_alpha_pll;
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extern const struct clk_ops clk_ops_fixed_fabia_alpha_pll;
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extern const struct clk_ops clk_ops_fabia_alpha_pll;
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