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/*
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* Copyright 2002 Momentum Computer Inc.
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* Author: Matthew Dharm <mdharm@momenco.com>
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: jsun@mvista.com or jsun@junsun.net
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*
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* First-level interrupt dispatcher for Ocelot-CS board.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include "ocelot_c_fpga.h"
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/*
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* First level interrupt dispatcher for Ocelot-CS board
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*/
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.align 5
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NESTED(ocelot_handle_int, PT_SIZE, sp)
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SAVE_ALL
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CLI
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.set at
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mfc0 t0, CP0_CAUSE
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mfc0 t2, CP0_STATUS
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and t0, t2
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andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
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bnez t1, ll_sw0_irq
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andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
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bnez t1, ll_sw1_irq
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andi t1, t0, STATUSF_IP2 /* int0 hardware line */
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bnez t1, ll_scsi_irq
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andi t1, t0, STATUSF_IP3 /* int1 hardware line */
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bnez t1, ll_uart_decode_irq
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andi t1, t0, STATUSF_IP4 /* int2 hardware line */
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bnez t1, ll_pmc_irq
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andi t1, t0, STATUSF_IP5 /* int3 hardware line */
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bnez t1, ll_cpci_decode_irq
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andi t1, t0, STATUSF_IP6 /* int4 hardware line */
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bnez t1, ll_mv64340_decode_irq
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andi t1, t0, STATUSF_IP7 /* cpu timer */
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bnez t1, ll_cputimer_irq
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.set reorder
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/* wrong alarm or masked ... */
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j spurious_interrupt
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nop
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END(ocelot_handle_int)
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.align 5
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ll_sw0_irq:
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li a0, 0
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_sw1_irq:
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li a0, 1
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_scsi_irq:
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li a0, 2
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_uart_decode_irq:
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move a0, sp
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jal ll_uart_irq
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j ret_from_irq
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ll_pmc_irq:
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li a0, 4
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpci_decode_irq:
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move a0, sp
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jal ll_cpci_irq
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j ret_from_irq
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ll_mv64340_decode_irq:
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move a0, sp
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jal ll_mv64340_irq
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j ret_from_irq
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ll_cputimer_irq:
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li a0, 7
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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