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/*
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* Board and PCI setup routines for IBM Spruce
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*
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* Author: MontaVista Software <source@mvista.com>
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*
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* 2000-2004 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/types.h>
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#include <linux/major.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/ide.h>
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#include <linux/root_dev.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_core.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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#include <asm/todc.h>
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#include <asm/bootinfo.h>
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#include <asm/kgdb.h>
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#include <syslib/cpc700.h>
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#include "spruce.h"
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static inline int
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spruce_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{23, 24, 25, 26}, /* IDSEL 1 - PCI slot 3 */
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{24, 25, 26, 23}, /* IDSEL 2 - PCI slot 2 */
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{25, 26, 23, 24}, /* IDSEL 3 - PCI slot 1 */
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{26, 23, 24, 25}, /* IDSEL 4 - PCI slot 0 */
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};
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const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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}
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static void __init
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spruce_setup_hose(void)
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{
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struct pci_controller *hose;
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/* Setup hose */
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hose = pcibios_alloc_controller();
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if (!hose)
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return;
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hose->first_busno = 0;
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hose->last_busno = 0xff;
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pci_init_resource(&hose->io_resource,
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SPRUCE_PCI_LOWER_IO,
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SPRUCE_PCI_UPPER_IO,
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IORESOURCE_IO,
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"PCI host bridge");
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pci_init_resource(&hose->mem_resources[0],
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SPRUCE_PCI_LOWER_MEM,
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SPRUCE_PCI_UPPER_MEM,
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IORESOURCE_MEM,
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"PCI host bridge");
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hose->io_space.start = SPRUCE_PCI_LOWER_IO;
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hose->io_space.end = SPRUCE_PCI_UPPER_IO;
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hose->mem_space.start = SPRUCE_PCI_LOWER_MEM;
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hose->mem_space.end = SPRUCE_PCI_UPPER_MEM;
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hose->io_base_virt = (void *)SPRUCE_ISA_IO_BASE;
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setup_indirect_pci(hose,
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SPRUCE_PCI_CONFIG_ADDR,
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SPRUCE_PCI_CONFIG_DATA);
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hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = spruce_map_irq;
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}
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/*
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* CPC700 PIC interrupt programming table
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*
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* First entry is the sensitivity (level/edge), second is the polarity.
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*/
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unsigned int cpc700_irq_assigns[32][2] = {
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{ 1, 1 }, /* IRQ 0: ECC Correctable Error - rising edge */
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{ 1, 1 }, /* IRQ 1: PCI Write Mem Range - rising edge */
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{ 0, 1 }, /* IRQ 2: PCI Write Command Reg - active high */
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{ 0, 1 }, /* IRQ 3: UART 0 - active high */
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{ 0, 1 }, /* IRQ 4: UART 1 - active high */
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{ 0, 1 }, /* IRQ 5: ICC 0 - active high */
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{ 0, 1 }, /* IRQ 6: ICC 1 - active high */
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{ 0, 1 }, /* IRQ 7: GPT Compare 0 - active high */
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{ 0, 1 }, /* IRQ 8: GPT Compare 1 - active high */
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{ 0, 1 }, /* IRQ 9: GPT Compare 2 - active high */
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{ 0, 1 }, /* IRQ 10: GPT Compare 3 - active high */
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{ 0, 1 }, /* IRQ 11: GPT Compare 4 - active high */
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{ 0, 1 }, /* IRQ 12: GPT Capture 0 - active high */
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{ 0, 1 }, /* IRQ 13: GPT Capture 1 - active high */
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{ 0, 1 }, /* IRQ 14: GPT Capture 2 - active high */
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{ 0, 1 }, /* IRQ 15: GPT Capture 3 - active high */
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{ 0, 1 }, /* IRQ 16: GPT Capture 4 - active high */
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{ 0, 0 }, /* IRQ 17: Reserved */
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{ 0, 0 }, /* IRQ 18: Reserved */
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{ 0, 0 }, /* IRQ 19: Reserved */
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{ 0, 1 }, /* IRQ 20: FPGA EXT_IRQ0 - active high */
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{ 1, 1 }, /* IRQ 21: Mouse - rising edge */
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{ 1, 1 }, /* IRQ 22: Keyboard - rising edge */
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{ 0, 0 }, /* IRQ 23: PCI Slot 3 - active low */
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{ 0, 0 }, /* IRQ 24: PCI Slot 2 - active low */
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{ 0, 0 }, /* IRQ 25: PCI Slot 1 - active low */
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{ 0, 0 }, /* IRQ 26: PCI Slot 0 - active low */
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};
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static void __init
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spruce_calibrate_decr(void)
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{
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int freq, divisor = 4;
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/* determine processor bus speed */
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freq = SPRUCE_BUS_SPEED;
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tb_ticks_per_jiffy = freq / HZ / divisor;
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tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
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}
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static int
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spruce_show_cpuinfo(struct seq_file *m)
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{
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seq_printf(m, "vendor\t\t: IBM\n");
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seq_printf(m, "machine\t\t: Spruce\n");
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return 0;
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}
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static void __init
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spruce_early_serial_map(void)
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{
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u32 uart_clk;
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struct uart_port serial_req;
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if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A)))
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uart_clk = SPRUCE_BAUD_33M * 16;
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else
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uart_clk = SPRUCE_BAUD_30M * 16;
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/* Setup serial port access */
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memset(&serial_req, 0, sizeof(serial_req));
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serial_req.uartclk = uart_clk;
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serial_req.irq = UART0_INT;
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serial_req.flags = UPF_BOOT_AUTOCONF;
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serial_req.iotype = UPIO_MEM;
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serial_req.membase = (u_char *)UART0_IO_BASE;
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serial_req.regshift = 0;
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#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
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gen550_init(0, &serial_req);
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#endif
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#ifdef CONFIG_SERIAL_8250
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if (early_serial_setup(&serial_req) != 0)
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printk("Early serial init of port 0 failed\n");
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#endif
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/* Assume early_serial_setup() doesn't modify serial_req */
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serial_req.line = 1;
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serial_req.irq = UART1_INT;
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serial_req.membase = (u_char *)UART1_IO_BASE;
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#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
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gen550_init(1, &serial_req);
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#endif
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#ifdef CONFIG_SERIAL_8250
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if (early_serial_setup(&serial_req) != 0)
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printk("Early serial init of port 1 failed\n");
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#endif
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}
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TODC_ALLOC();
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static void __init
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spruce_setup_arch(void)
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{
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/* Setup TODC access */
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TODC_INIT(TODC_TYPE_DS1643, 0, 0, SPRUCE_RTC_BASE_ADDR, 8);
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/* init to some ~sane value until calibrate_delay() runs */
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loops_per_jiffy = 50000000 / HZ;
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/* Setup PCI host bridge */
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spruce_setup_hose();
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_SDA1;
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#endif
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/* Identify the system */
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printk(KERN_INFO "System Identification: IBM Spruce\n");
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printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
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}
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static void
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spruce_restart(char *cmd)
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{
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local_irq_disable();
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/* SRR0 has system reset vector, SRR1 has default MSR value */
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/* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
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__asm__ __volatile__
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("\n\
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lis 3,0xfff0 \n\
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ori 3,3,0x0100 \n\
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mtspr 26,3 \n\
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li 3,0 \n\
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mtspr 27,3 \n\
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rfi \n\
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");
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for(;;);
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}
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static void
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spruce_power_off(void)
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{
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for(;;);
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}
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static void
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spruce_halt(void)
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{
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spruce_restart(NULL);
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}
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static void __init
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spruce_map_io(void)
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{
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io_block_mapping(SPRUCE_PCI_IO_BASE, SPRUCE_PCI_PHY_IO_BASE,
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0x08000000, _PAGE_IO);
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}
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/*
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* Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
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*/
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static __inline__ void
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spruce_set_bat(void)
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{
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mb();
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mtspr(SPRN_DBAT1U, 0xf8000ffe);
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mtspr(SPRN_DBAT1L, 0xf800002a);
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mb();
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}
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void __init
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platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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parse_bootinfo(find_bootinfo());
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/* Map in board regs, etc. */
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spruce_set_bat();
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isa_io_base = SPRUCE_ISA_IO_BASE;
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pci_dram_offset = SPRUCE_PCI_SYS_MEM_BASE;
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ppc_md.setup_arch = spruce_setup_arch;
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ppc_md.show_cpuinfo = spruce_show_cpuinfo;
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ppc_md.init_IRQ = cpc700_init_IRQ;
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ppc_md.get_irq = cpc700_get_irq;
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ppc_md.setup_io_mappings = spruce_map_io;
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ppc_md.restart = spruce_restart;
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ppc_md.power_off = spruce_power_off;
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ppc_md.halt = spruce_halt;
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ppc_md.time_init = todc_time_init;
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ppc_md.set_rtc_time = todc_set_rtc_time;
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ppc_md.get_rtc_time = todc_get_rtc_time;
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ppc_md.calibrate_decr = spruce_calibrate_decr;
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ppc_md.nvram_read_val = todc_direct_read_val;
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ppc_md.nvram_write_val = todc_direct_write_val;
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spruce_early_serial_map();
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#ifdef CONFIG_SERIAL_TEXT_DEBUG
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ppc_md.progress = gen550_progress;
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#endif /* CONFIG_SERIAL_TEXT_DEBUG */
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#ifdef CONFIG_KGDB
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ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
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#endif
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}
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