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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2004 by Ralf Baechle
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*/
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#ifndef __ASM_MIPS_MARVELL_H
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#define __ASM_MIPS_MARVELL_H
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#include <linux/pci.h>
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#include <asm/byteorder.h>
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extern unsigned long marvell_base;
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/*
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* Because of an error/peculiarity in the Galileo chip, we need to swap the
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* bytes when running bigendian.
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*/
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#define __MV_READ(ofs) \
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(*(volatile u32 *)(marvell_base+(ofs)))
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#define __MV_WRITE(ofs, data) \
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do { *(volatile u32 *)(marvell_base+(ofs)) = (data); } while (0)
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#define MV_READ(ofs) le32_to_cpu(__MV_READ(ofs))
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#define MV_WRITE(ofs, data) __MV_WRITE(ofs, cpu_to_le32(data))
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#define MV_READ_16(ofs) \
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le16_to_cpu(*(volatile u16 *)(marvell_base+(ofs)))
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#define MV_WRITE_16(ofs, data) \
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*(volatile u16 *)(marvell_base+(ofs)) = cpu_to_le16(data)
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#define MV_READ_8(ofs) \
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*(volatile u8 *)(marvell_base+(ofs))
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#define MV_WRITE_8(ofs, data) \
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*(volatile u8 *)(marvell_base+(ofs)) = data
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#define MV_SET_REG_BITS(ofs, bits) \
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(*((volatile u32 *)(marvell_base + (ofs)))) |= ((u32)cpu_to_le32(bits))
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#define MV_RESET_REG_BITS(ofs, bits) \
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(*((volatile u32 *)(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits))
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extern struct pci_ops mv_pci_ops;
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struct mv_pci_controller {
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struct pci_controller pcic;
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/*
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* GT-64240/MV-64340 specific, per host bus information
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*/
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unsigned long config_addr;
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unsigned long config_vreg;
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};
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extern void ll_mv64340_irq(void);
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#endif /* __ASM_MIPS_MARVELL_H */
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