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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MDSS_28NM_PLL_CLK_H
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#define __MDSS_28NM_PLL_CLK_H
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/* DSI PLL clocks */
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#define VCO_CLK_0 0
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#define ANALOG_POSTDIV_0_CLK 1
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#define INDIRECT_PATH_SRC_0_CLK 2
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#define BYTECLK_SRC_MUX_0_CLK 3
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#define BYTECLK_SRC_0_CLK 4
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#define PCLK_SRC_0_CLK 5
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#define VCO_CLK_1 6
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#define ANALOG_POSTDIV_1_CLK 7
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#define INDIRECT_PATH_SRC_1_CLK 8
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#define BYTECLK_SRC_MUX_1_CLK 9
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#define BYTECLK_SRC_1_CLK 10
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#define PCLK_SRC_1_CLK 11
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/* HDMI PLL clocks */
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#define HDMI_VCO_CLK 0
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#define HDMI_VCO_DIVIDED_1_CLK_SRC 1
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#define HDMI_VCO_DIVIDED_TWO_CLK_SRC 2
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#define HDMI_VCO_DIVIDED_FOUR_CLK_SRC 3
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#define HDMI_VCO_DIVIDED_SIX_CLK_SRC 4
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#define HDMI_PCLK_SRC_MUX 5
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#define HDMI_PCLK_SRC 6
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#endif
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