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58 lines
1.8 KiB
58 lines
1.8 KiB
20 years ago
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/*
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* A collection of structures, addresses, and values associated with
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* the Motorola 860T FADS board. Copied from the MBX stuff.
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*
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* Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_FADS_H__
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#define __ASM_FADS_H__
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#include <linux/config.h>
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#include <asm/ppcboot.h>
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/* Memory map is configured by the PROM startup.
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* I tried to follow the FADS manual, although the startup PROM
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* dictates this and we simply have to move some of the physical
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* addresses for Linux.
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*/
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#define BCSR_ADDR ((uint)0xff010000)
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#define BCSR_SIZE ((uint)(64 * 1024))
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#define BCSR0 ((uint)0xff010000)
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#define BCSR1 ((uint)0xff010004)
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#define BCSR2 ((uint)0xff010008)
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#define BCSR3 ((uint)0xff01000c)
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#define BCSR4 ((uint)0xff010010)
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#define IMAP_ADDR ((uint)0xff000000)
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#define IMAP_SIZE ((uint)(64 * 1024))
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#define PCMCIA_MEM_ADDR ((uint)0xff020000)
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#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
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/* Bits of interest in the BCSRs.
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*/
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#define BCSR1_ETHEN ((uint)0x20000000)
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#define BCSR1_RS232EN_1 ((uint)0x01000000)
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#define BCSR1_RS232EN_2 ((uint)0x00040000)
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#define BCSR4_ETHLOOP ((uint)0x80000000) /* EEST Loopback */
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#define BCSR4_EEFDX ((uint)0x40000000) /* EEST FDX enable */
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#define BCSR4_FETH_EN ((uint)0x08000000) /* PHY enable */
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#define BCSR4_FETHCFG0 ((uint)0x04000000) /* PHY autoneg mode */
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#define BCSR4_FETHCFG1 ((uint)0x00400000) /* PHY autoneg mode */
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#define BCSR4_FETHFDE ((uint)0x02000000) /* PHY FDX advertise */
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#define BCSR4_FETHRST ((uint)0x00200000) /* PHY Reset */
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/* Interrupt level assignments.
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*/
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#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */
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#define PHY_INTERRUPT SIU_IRQ2 /* PHY link change interrupt */
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/* We don't use the 8259.
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*/
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#define NR_8259_INTS 0
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#endif /* __ASM_FADS_H__ */
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#endif /* __KERNEL__ */
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