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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_INTR_H
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#define _ASM_IA64_SN_INTR_H
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#include <linux/rcupdate.h>
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#define SGI_UART_VECTOR (0xe9)
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/* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */
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#define SGI_XPC_ACTIVATE (0x30)
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#define SGI_II_ERROR (0x31)
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#define SGI_XBOW_ERROR (0x32)
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#define SGI_PCIASIC_ERROR (0x33)
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#define SGI_ACPI_SCI_INT (0x34)
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#define SGI_TIOCA_ERROR (0x35)
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#define SGI_TIO_ERROR (0x36)
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#define SGI_TIOCX_ERROR (0x37)
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#define SGI_MMTIMER_VECTOR (0x38)
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#define SGI_XPC_NOTIFY (0xe7)
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#define IA64_SN2_FIRST_DEVICE_VECTOR (0x3c)
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#define IA64_SN2_LAST_DEVICE_VECTOR (0xe6)
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#define SN2_IRQ_RESERVED (0x1)
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#define SN2_IRQ_CONNECTED (0x2)
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#define SN2_IRQ_SHARED (0x4)
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// The SN PROM irq struct
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struct sn_irq_info {
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struct sn_irq_info *irq_next; /* deprecated DO NOT USE */
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short irq_nasid; /* Nasid IRQ is assigned to */
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int irq_slice; /* slice IRQ is assigned to */
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int irq_cpuid; /* kernel logical cpuid */
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int irq_irq; /* the IRQ number */
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int irq_int_bit; /* Bridge interrupt pin */
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uint64_t irq_xtalkaddr; /* xtalkaddr IRQ is sent to */
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int irq_bridge_type;/* pciio asic type (pciio.h) */
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void *irq_bridge; /* bridge generating irq */
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void *irq_pciioinfo; /* associated pciio_info_t */
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int irq_last_intr; /* For Shub lb lost intr WAR */
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int irq_cookie; /* unique cookie */
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int irq_flags; /* flags */
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int irq_share_cnt; /* num devices sharing IRQ */
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struct list_head list; /* list of sn_irq_info structs */
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struct rcu_head rcu; /* rcu callback list */
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};
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extern void sn_send_IPI_phys(int, long, int, int);
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#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector)
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#endif /* _ASM_IA64_SN_INTR_H */
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