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84 lines
2.1 KiB
84 lines
2.1 KiB
20 years ago
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/*
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* linux/include/asm-arm/arch-sa1100/hardware.h
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*
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* Copyright (C) 1998 Nicolas Pitre <nico@cam.org>
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*
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* This file contains the hardware definitions for SA1100 architecture
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*
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* 2000/05/23 John Dorsey <john+@cs.cmu.edu>
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* Definitions for SA1111 added.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <linux/config.h>
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/* Flushing areas */
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#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */
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#define FLUSH_BASE 0xf5000000
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#define FLUSH_BASE_MINICACHE 0xf5800000
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#define UNCACHEABLE_ADDR 0xfa050000
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/*
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* We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for
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* in*()/out*() macros to be usable for all cases.
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*/
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#define PCIO_BASE 0
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/*
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* SA1100 internal I/O mappings
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*
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* We have the following mapping:
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* phys virt
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* 80000000 f8000000
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* 90000000 fa000000
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* a0000000 fc000000
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* b0000000 fe000000
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*/
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#define VIO_BASE 0xf8000000 /* virtual start of IO space */
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#define VIO_SHIFT 3 /* x = IO space shrink power */
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#define PIO_START 0x80000000 /* physical start of IO space */
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#define io_p2v( x ) \
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( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE )
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#define io_v2p( x ) \
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( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
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#ifndef __ASSEMBLY__
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#include <asm/types.h>
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#if 0
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# define __REG(x) (*((volatile u32 *)io_p2v(x)))
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#else
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/*
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* This __REG() version gives the same results as the one above, except
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* that we are fooling gcc somehow so it generates far better and smaller
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* assembly code for access to contigous registers. It's a shame that gcc
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* doesn't guess this by itself.
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*/
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typedef struct { volatile u32 offset[4096]; } __regbase;
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# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
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# define __REG(x) __REGP(io_p2v(x))
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#endif
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# define __PREG(x) (io_v2p((u32)&(x)))
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#else
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# define __REG(x) io_p2v(x)
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# define __PREG(x) io_v2p(x)
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#endif
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#include "SA-1100.h"
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#ifdef CONFIG_SA1101
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#include "SA-1101.h"
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#endif
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#endif /* _ASM_ARCH_HARDWARE_H */
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